Postgraduate research project

Design and implementation of hardware acceleration exploiting novel chiplet architecture

Funding
Fully funded (UK only)
Type of degree
Doctor of Philosophy
Entry requirements
2:1 honours degree View full entry requirements
Faculty graduate school
Faculty of Engineering and Physical Sciences
Closing date

About the project

This PhD explores innovative chiplet‑based hardware acceleration, spanning architectural design to real ASIC tapeout. It offers flexible research directions, including reconfigurable accelerators and scalable multi‑chiplet systems. You will work with industry‑aligned experts to develop cutting‑edge silicon prototypes using emerging heterogeneous integration technologies.

Recent advances in many areas of semiconductor applications are placing significant strain on hardware, while the 50-year trend of relentless improvements that CMOS scaling has offered is reaching its limits. As a result, industry is shifting toward heterogeneous integration, including chiplets, advanced 2.5D/3D packaging, application-specific accelerators, and novel memory technologies. This emerging design philosophy—sometimes referred to as “CMOS 2.0”—relies not on a single technology but on mixing-and-matching technology ingredients to unlock system scaling bottlenecks. 

This PhD project will explore how chiplet technologies can be exploited to design novel, efficient, and scalable hardware accelerators. Spanning the full design flow from architectural design through to fabricated silicon prototypes. This could include:

  • software-hardware co-design for reconfigurable accelerator chiplets
  • energy-efficient domain-specific acceleration including power gating and DVFS strategies for multi-chiplet accelerators
  • scalable accelerator arrays and tiled architectures
  • reconfigurable accelerator chiplets with runtime adaptability

This studentship offers a unique opportunity to contribute to cutting-edge research in hardware acceleration whilst gaining hands-on experience designing and taping out chiplet-based accelerator hardware on real silicon.

This PhD project will be done in collaboration with soclabs, a group at the University of Southampton working closely with industry leaders in semiconductor design including Arm and Synopsys. The soclabs team, including David Flynn (previously a fellow in R&D at Arm and with the company for over 25 years), will provide technical expertise and guidance throughout the project.

The School of Electronics & Computer Science is committed to promoting equality, diversity inclusivity as demonstrated by our Athena SWAN award. We welcome all applicants regardless of their gender, ethnicity, disability, sexual orientation or age, and will give full consideration to applicants seeking flexible working patterns and those who have taken a career break. The University has a generous maternity policy, onsite childcare facilities, and offers a range of benefits to help ensure employees’ well-being and work-life balance. The University of Southampton is committed to sustainability and has been awarded the Platinum EcoAward.